Unterschiede

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--- project:hgg:hardwaredoc:friendship [2012-03-17 20:28] – reloc0
+++ project:hgg:hardwaredoc:friendship [2012-05-17 19:36] (aktuell) – [Design decissions] 93.231.180.130
@@ Zeile 11: / Zeile 11: @@
 The connectors used for the module cards are physically (but not electrically) PCI-Express x4 Slots. Those are reasonably cheap and generally available at electronic shops.
-One of the ports is special, it is the port for the busmaster. The busmaster controls the stuff that happens on the bus and is also controlling the bus protocol. The busmaster port has an additional set of pins at the front of the PCIe slot. Thus not more than 1 busmaster can be present on the bus.
+One of the ports is special, it is the port for the busmaster. The busmaster controls the stuff that happens on the bus and is also controlling the bus protocol. The busmaster port has an additional set of pins at the front of the PCIe slot. Thus not more than 1 busmaster can be present on the bus. Please refer for a busmaster port extension at the bottom of this document.
 Only few things should happen on the backplane board. It is mainly a bus system and nothing more. So there's just the slots and a few components on that board.
@@ Zeile 17: / Zeile 17: @@
 ====== Overview of the pinning / Design  ======
-The design for PCIe x4 slots and Cards can be found in the HGG git repository on github (direct link: [[https://github.com/shackspace/hgg/tree/master/eagle]]). It contains an eagle library we use in our designs. Currently only one side of the PCIe slots is used, the other pins are reserved for extensions (like for example a high speed bus).
+The design for PCIe x4 slots and Cards can be found in the HGG git repository on github (direct link: [[https://github.com/shackspace/hgg/tree/master/hgg/libs/eagle]]). It contains an eagle library we use in our designs. Currently only one side of the PCIe slots is used, the other pins are reserved for extensions (like for example a high speed bus).
 The bus looks like this in the schematic:
-{{:project:hgg:hardwaredoc:friendship_schematic.jpeg?200|}}
+{{:project:hgg:hardwaredoc:friendship.png?200|}}
 The schematic divides the pins by responsibility:
@@ Zeile 62: / Zeile 62: @@
+====== Extension for the Busmaster Card ======
+The card port for the busmaster has an additional part for getting information about stuff going on the bus like interrupt handling, card present-status and so on. This port is available only on port 0 which is therefore not useable for anything but the busmaster. The busmaster port's current layout is this:
+{{:project:hgg:hardwaredoc:busmasterport.png?200|}}