HGG: Backplane v1 Design Idea

Bus

Data (possibilities)
- RS485 (Single master, Multi point)
- CAN (Multi master)
Timing
- PPS
- High accuracy clock

Module <> Bus Interface

A high precision clock source (compensated VCXO or OCXO) is used to increment a counter which can cover the time of one second without roll-over. The counter is reset via the PPS signal. Time since last PPS is thus tracked by the adder. To read the time the adder state is latched to a series of parallel-in/serial-out and then lazily clocked out to the uC.